In a microelectronic device, thermal transport needs to be simulated on scales ranging from tens of nanometers to hundreds of millimeters. High accuracy multiscale models are required to develop engineering tools for predicting temperature distributions with sufficient accuracy in such devices. A computationally efficient and accurate multiscale reduced order transient thermal modeling methodology was developed using a combination of two different approaches: “progressive zoom-in” method and “proper orthogonal decomposition (POD)” technique. The capability of this approach in handling several decades of length scales from “package” to “chip components” at a considerably lower computational cost, while maintaining satisfactory accuracy was demonstrated. A flip chip ball grid array (FCBGA) package was considered for demonstration. The transient temperature and heat fluxes calculated on the top and bottom walls of the embedded chip at the package level simulations are employed as dynamic boundary conditions for the chip level simulation. The chip is divided into ten function blocks. Randomly generated dynamic power sources are applied in each of these blocks. The temperature rise in the different layers of the chip calculated from the multiscale model is compared with a finite element (FE) model. The close agreement between two models confirms that the multiscale approach can predict temperature rise accurately for scenarios corresponding to different power sources in functional blocks, without performing detailed FE simulations, which significantly reduces computational effort.
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September 2015
Research-Article
Multiscale Transient Thermal Analysis of Microelectronics
Banafsheh Barabadi,
Banafsheh Barabadi
Department of Mechanical Engineering,
Massachusetts Institute of Technology
,77 Massachusetts Avenue
,Cambridge, MA 02139
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Satish Kumar,
Satish Kumar
George W. Woodruff School
of Mechanical Engineering,
of Mechanical Engineering,
Georgia Institute of Technology
,801 Ferst Drive
,Atlanta, GA 30332
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Valeriy Sukharev,
Valeriy Sukharev
Design-to-Silicon,
Mentor Graphics Corporation
,46871 Bayside Parkway
,Fremont, CA 94538
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Yogendra K. Joshi
Yogendra K. Joshi
1
George W. Woodruff School
of Mechanical Engineering,
e-mail: yogendra.joshi@me.gatech.edu
of Mechanical Engineering,
Georgia Institute of Technology
,801 Ferst Drive
,Atlanta, GA 30332
e-mail: yogendra.joshi@me.gatech.edu
1Corresponding author.
Search for other works by this author on:
Banafsheh Barabadi
Department of Mechanical Engineering,
Massachusetts Institute of Technology
,77 Massachusetts Avenue
,Cambridge, MA 02139
Satish Kumar
George W. Woodruff School
of Mechanical Engineering,
of Mechanical Engineering,
Georgia Institute of Technology
,801 Ferst Drive
,Atlanta, GA 30332
Valeriy Sukharev
Design-to-Silicon,
Mentor Graphics Corporation
,46871 Bayside Parkway
,Fremont, CA 94538
Yogendra K. Joshi
George W. Woodruff School
of Mechanical Engineering,
e-mail: yogendra.joshi@me.gatech.edu
of Mechanical Engineering,
Georgia Institute of Technology
,801 Ferst Drive
,Atlanta, GA 30332
e-mail: yogendra.joshi@me.gatech.edu
1Corresponding author.
Contributed by the Electronic and Photonic Packaging Division of ASME for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received May 2, 2013; final manuscript received February 16, 2015; published online April 16, 2015. Assoc. Editor: Amy Fleischer.
J. Electron. Packag. Sep 2015, 137(3): 031002 (8 pages)
Published Online: September 1, 2015
Article history
Received:
May 2, 2013
Revision Received:
February 16, 2015
Online:
April 16, 2015
Citation
Barabadi, B., Kumar, S., Sukharev, V., and Joshi, Y. K. (September 1, 2015). "Multiscale Transient Thermal Analysis of Microelectronics." ASME. J. Electron. Packag. September 2015; 137(3): 031002. https://doi.org/10.1115/1.4029835
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